8085 Instruction Set
Contents
Learning objective: To understand and define instructions set of the 8085 microprocessor.
Overview
- An instruction is a binary pattern that specifies a function in the microprocessor.
- The instruction set includes all the instructions that can be performed by the microprocessor.
- The microprocessor only understands machine code. The instructions are in binary format and is categorised into 2 parts: the opcode and the operand.
There are 5 types of instructions for 8085 microprocessor:
- Data transfer
- Arithmetic
- Logical
- Branching
- Control
1 Data transfer instructions
Instructions that move data between registers, or between memory and registers.
- Rd - destination register
- Rd - source register
- R - register
- M - memory location
- A - accumulator
| Opcode | Operand | Description |
|---|---|---|
| MOV | Rd, Rs M, Rs Rd, M |
Copy from source to destination |
| MVI | Rd, Data M, Data |
Store 8 bit immediate data to destonation |
| LXI | Register pair, Data | Load 16 bit immediate data to register pair |
| MVI | Rd, Data M, Data |
Store 8 bit immediate data to destonation |
| LDA | M | Copy contents of memory address specified by 16 bit data to accumulator |
| STA | M | Copy contents of accumulator to memory location specified by 16 bit data |
2 Arithmetic instructions
Instructions that performs mathematical operations.
| Opcode | Operand | Description |
|---|---|---|
| ADD | R M |
Add contents of register or memory to accumulator |
| ADI | Data | Add 8-bit data to the contents of accumulator |
| SUB | R M |
Subtract contents of register or memory from accumulator |
| SUI | Data | Subtract 8-bit data from the contents of accumulator |
| INR | R M |
Increment contents of register or memory location by 1 |
| INX | Register pair | Increment contents of register pair by 1 |
| DCR | R M |
Decrement contents of register or memory location by 1 |
| DCX | Register pair | Decrement contents of register pair by 1 |
3 Logical instructions
Instructions that performs logical operations.
| Opcode | Operand | Description |
|---|---|---|
| ANA | R M |
Logical AND contents of register or memory with accumulator |
| ANI | Data | Logical AND 8 bit data with accumulator |
| ORA | R M |
Logical OR contents of register or memory with accumulator |
| ORI | Data | Logical OR 8 bit data with accumulator |
| XRA | R M |
Logical XOR contents of register or memory with accumulator |
| XRI | Data | Logical XOR 8 bit data with accumulator |
| CMP | R M |
Compare contents of register or memory with accumulator If A < R/M, carry flag is set. If A = R/M, zero flag is set. If A > R/M, carry and zero flags are reset. |
| CMI | Data | Compare 8 bit data with accumulator If A < Data, carry flag is set. If A = Data, zero flag is set. If A > Data, carry and zero flags are reset. |
| CMA | None | Complement the contents of accumulator |
4 Braching instructions
Instruction that change the sequential flow of the program.
Conditional Jumps
| Opcode | Operand | Description |
|---|---|---|
| JMP | 16 bit address | Jump to location specified by address unconditionally |
Unconditional Jumps
| Opcode | Operand | Description |
|---|---|---|
| JC | Jump on carry | CY=1 |
| JNC | Jump on not carry | CY=0 |
| JP | Jump on positive | S=0 |
| JM | Jump on minus | S=1 |
| JPE | Jump on parity even | P=1 |
| JPO | Jump on parity odd | P=0 |
| JZ | Jump on zero | Z=1 |
| JNZ | Jump on not zero | Z=0 |
5 Control instructions
Instructions that control the execution of operations in the microprocessor.
| Opcode | Operand | Description |
|---|---|---|
| NOP | None | No operation is performed |
| HLT | None | Finish executing the current instruction and halts any further execution |